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Question about memory in slides


In the slides regarding memory, we have that memory units have one n-bit data bus, which takes read and write data. However, we have that these are different wires on the large-scale microprocessor diagram (data is coming out from the right, and write data is going in from the left). How are these compatible abstractions of memory?


The single bus to perform both read and write operations was used in legacy computer systems and small microprocessors. Example: VMEbus used in Motorola 68000 processors. Most modern CPUs and microprocessors use multiple read and write lines to streamline communication.


So the two abstractions are just incompatible? Like the larger diagram does not describe the same processor as the memory-bus does?